A novel approach for bit-serial AB2 multiplication in finite fields GF(2m)

Paper : Bit - Serial Multiplier Techniques for Finite Fields

Efficient Bit-Serial Constant Multiplication for FPGAs

This paper describes how to realize place-effective synchronous bit-serial constant multiplications, which can be efficiently used for a block of constants (Multiple Constant Multiplication). The architecture combines traditional concepts and new approaches, which leads to the possibility of simultanous fast multiplications of different input values. Fast multiplications are a core for up-to-da...

Bit-serial AB2 Multiplier Using Modified Inner Product

This paper presents a new multiplication algorithm and, based on this algorithm, proposes a hardware architecture, called Modified Inner-Product Multiplier (MIPM), which computes AB multiplication based on a Linear Feedback Shift Register (LFSR). The algorithm is based on the property of the irreducible all one polynomial (AOP) over the finite field GF(2). The proposed architecture reduces the ...

A Bit-Serial Multiplier Architecture for Finite Fields Over Galois Fields

Problem statement: A fundamental building block for digital communication is the Publickey cryptography systems. Public-Key Cryptography (PKC) systems can be used to provide secure communications over insecure channels without exchanging a secret key. Implementing Public-Key cryptography systems is a challenge for most application platforms when several factors have to be considered in selectin...

A Bit-Serial Multiplier Architecture for Finite Fields Over Galois Fields

Problem statement: A fundamental building block for digital communication is the Publickey cryptography systems. Public-Key Cryptography (PKC) systems can be used to provide secure communications over insecure channels without exchanging a secret key. Implementing Public-Key cryptography systems is a challenge for most application platforms when several factors have to be considered in selectin...